by lpetrich » Mon 13 Aug 2018, 12:53:48
It looks like we have reached the limit of the feasible size of an integrated-circuit component. This means that computer-chip design will have to expand in other directions. Instead of vertical expansion (faster, smaller components), we will have lots of horizontal expansion (more components).
This produces a serious programming challenge. With more components per chip and individual processors having the same number of components, a logical route of expansion is more individual processors. This means that one can do more parallel processing per chip.
Each individual processor is a single-instruction-stream, single-data-stream (SISD) system, the sort of thing that one learns early in a computer-architecture class.
For multiple processors, one can make them act like separate individual ones, making a multiple-instruction-stream, multiple-data-stream (MIMD) system. This is the most flexible approach, but also the most complicated one.
One can use the shortcut of having several processors do the same instructions, while operating on different sets of data. This gives a single-instruction-stream, multiple-data-stream (SIMD) system.
In practice, the two are often combined.
Intel has supported SIMD in its x86 chips since the mid-1990's: MMX, SSE, AVX. These chips issue SIMD instructions alongside their SISD ones. This is also done in some other chip architectures, like POWER/PowerPC, Sparc, MIPS, ARM, and PA-RISC.
Multicore chips are essentially MIMD, with each core being SISD though often with SIMD as explained above.
GPU's often use SIMD, for reasons that ought to be obvious -- doing the same thing to lots of pixels.